The present invention relates to delta-sigma modulation for analog-to-digital or digital-to-analog converters and, more particularly, to fourth-order delta-sigma modulation that includes dynamically altering the noise transfer function to provide an extended range of maximum, stable output amplitudes.
Power converters, which convert an AC input into a DC output, and power inverters, which convert a DC input into an AC output, (hereinafter, unless otherwise specified, referred to collectively as “converters”) are used in power electronics to provide a desired output. Furthermore, converters are adapted to convert analog to digital or digital to analog. As with most power electronics, control plays a big factor in design. Indeed, external control of power converters is necessary to provide improved regulation of the output signal. Some of the various means of external control include delta modulation and delta-sigma modulation.
Delta modulation for analog-to-digital signal conversion involves approximating an analog signal using a series of digital segments. Each of the digital segments is then compared to the original analog signal to determine any change (i.e., an increase or decrease) in relative amplitude. This increase or decrease associated with each segment determines the state of successive bits in the bit stream. For example, if there is no change in the relative amplitude, the modulated output signal remains at the digital 0 (zero) or 1 state; whereas, if there is a change in relative amplitude, then the modulated output signal changes from 0 or 1 accordingly.
Delta-sigma (ΔΣ) modulation is a hybrid analog-to-digital or digital-to-analog delta modulation technique. During ΔΣ modulation, an error (difference) between the input signal and a negative feedback signal is determined, then integrated. The integrated error is then compensated for by a comparator (or quantizer). The error value output is also fed back, inverted, and summed with the input signal. Accordingly, the mean output value is equal to the mean input value.
Delta-sigma (ΔΣ) modulators differ from more “conventional” modulators in that they include a delta-sigma (ΔΣ) converter, for converting an analog input signal into a digital bit stream, and a filter, which adds gain to the average signal level out of the bit stream. An example of a first-order ΔΣ modulator 10 is shown in FIG. 1.
The analog input signal 11 and an analog feedback signal 18 from a digital-to-analog converter (DAC) 19 are summed at summer 12. Those skilled in the art can appreciate that the input signal 11 and the feedback signal 18 could also be digital signals without departing from the scope or spirit of this disclosure. The difference between or error 13 of the two signals 11 and 18 from the summer 12 is integrated by an integrator 14. The integrated error signal 15 then enters a quantizer 16, which includes a pre-determined threshold value. The integrated error is either higher or lower or equal to the pre-determined threshold value. The digital output signal 17 of the quantizer 16 is filtered by a low-pass filter 20 and is also fed back to the summer 12 through the DAC 19.
Whenever signals are represented digitally, which is to say whenever signals are quantized, the imprecision in the conversion from analog-to-digital or from digital-to-analog unavoidably produces error between the continuous analog signal and the quantized digital signal. This error consists of additive, white (quantization) noise. The amount of quantization noise depends on the order of the modulator and the oversampling ratio.
The number of integrators and the number of feedback loops determine the “order” of the ΔΣ modulator. The ΔΣ modulator 10 in FIG. 1 is a “first-order” modulator because there is a single integrator 14 and a single feedback loop 25. A second-order ΔΣ modulator 30 is shown in FIG. 2. The second-order ΔΣ modulator 30 includes two integrators 22 and 24 and two feedback loops 21 and 23.
Better signal-to-noise performance implies a higher signal-to-noise ratio (SNR). Hence, a relatively high SNR is desirable. At DC (no frequency) and relatively low frequencies, such as between 0 and about 1,000 Hertz (Hz), increasing the order of an ΔΣ modulator results in a higher SNR and, accordingly, better signal-to-noise performance. Consequently, for small amplitude signals at DC or relatively low frequencies, output precision is improved by using higher-order ΔΣ modulators.
SNR of higher-order ΔΣ modulators at higher frequencies, however, is lowered. Moreover, with higher-order ΔΣ modulators, the maximum amplitude of the output signal beyond which the modulator becomes unstable is reduced. For many modulators, this does not pose a problem because the quantized output signal can simply be amplified. This is not the case for all ΔΣ modulators.
For example, in DAC systems in which the ΔΣ modulator directly drives an output bridge circuit in which the output(s) is/are switched to various reference voltages, depending on the ΔΣ output level, amplification prior to the output is not possible. In the case of a three-level ΔΣ output directly driving a differential H-bridge output, the bridge outputs are switched depending on the ΔΣ output in accordance with the following:
ΔΣ LevelVOUT+VOUT−+1VREF+VREF−−1VREF−VREF+0VREF+VREF+ orVREF−VREF−
The ΔΣ modulator drives and tracks the output signal directly without intervening signal processing. Hence, the reduced maximum, stable output amplitude limits the maximum output signal deliverable, which is to say, conventional ΔΣ modulation limits the range of maximum output signal amplitudes that can be delivered. For example, regardless of stability, a conventional fourth-order ΔΣ modulator having three quantizer levels (+1, 0, −1) may have a maximum stable output of about −6 dB relative to the maximum possible digital output amplitude. Notwithstanding the reduction in SNR for higher amplitude signal values, in certain ΔΣ modulator applications, such as voice or audio signal conversion, at relatively high signal amplitudes, better SNR performance can be sacrificed to increase the maximum output signal amplitude range because high signal amplitudes can better mask low levels of noise.
Therein lies the designer's dilemma: with smaller amplitude signals, higher-order ΔΣ modulators are highly desirable but with larger amplitude signals, lower-order ΔΣ modulators are more desirable. Switching between a higher- and lower-order ΔΣ modulators is one plausible solution. Indeed, dynamically varying the order of the ΔΣ modulator between higher-order AS modulators for smaller signals and lower-order ΔΣ modulators for larger signals is feasible. However, such modulation can result in relatively large and abrupt decreases in SNR for moderate to high oversampling ratios. Oversampling ratios (OSR) involve sampling a signal at a sampling frequency significantly higher than two times the bandwidth or highest frequency of the signal being sampled. For example, decreasing a three-level modulator's order from four to two at an OSR of 32 can cause an abrupt 26 dB reduction in SNR when the transition is made.
Therefore, it would be desirable to provide a ΔΣ converter as well as a ΔΣ modulator that are adapted to dynamically-control higher-order ΔΣ modulation and, moreover, that are adapted to dynamically-control higher-order ΔΣ modulation to provide a high SNR at relatively low signal amplitude levels using a first noise transfer function; but that is “detunable” at relatively greater signal amplitude levels using a second noise transfer function, to provide a greater range of stable, output signal amplitudes.